499 search results - page 18 / 100 » A Three-Phase Algorithm for Computer Aided siRNA Design |
DAC
2009
ACM
15 years 10 months ago
2009
ACM
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
ISPD
2010
ACM
15 years 4 months ago
2010
ACM
Double Patterning Lithography (DPL) is one of the few hopeful candidate solutions for the lithography for CMOS process beyond 45nm. DPL assigns the patterns less than a certain di...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
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DAC
2005
ACM
15 years 10 months ago
2005
ACM
? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
We present a method for designing operational amplifiers using reversed geometric programming, which is an extension of geometric programming that allows both convex and non-conve...