499 search results - page 29 / 100 » A Three-Phase Algorithm for Computer Aided siRNA Design |
DAC
2005
ACM
15 years 10 months ago
2005
ACM
In this paper, we present a new linear-time retiming algorithm that produces near-optimal results. Our implementation is specifically targeted at Altera's Stratix [1] FPGAbas...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
Layout parasitics have great impact on analog circuit performance. This paper presents an algorithm for explicit parasitic control during layout retargeting of analog integrated c...
IJACTAICIT
2010
14 years 4 months ago
2010
A real-time path generation method with Non Uniform Rational B Spline(NURBS) technology in the Computer Aided Design(CAD) field is presented and realized in a five-axis Computer N...
FPGA
2006
ACM
15 years 1 months ago
2006
ACM
The paper presents several improvements to state-of-theart in FPGA technology mapping exemplified by a recent advanced technology mapper DAOmap [Chen and Cong, ICCAD `04]. Improve...