499 search results - page 33 / 100 » A Three-Phase Algorithm for Computer Aided siRNA Design |
140
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DAC
2006
ACM
15 years 8 months ago
2006
ACM
This paper investigates methods for clock skew minimization using buffer and wire sizing. First, a technique that significantly improves solution quality and stability of sequent...
134
Voted
DAC
2007
ACM
15 years 6 months ago
2007
ACM
When designers create RTL models from a system-level specification, arrays in the system-level model are often implemented as memories in the RTL. Knowing the correspondence betwe...
122
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DAC
2001
ACM
16 years 3 months ago
2001
ACM
This paper presents a method of using texture mapping with mipmapping to render a VLSI layout. Texture mapping is used to save already rasterized areas of the layout from frame to...
106
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DAGSTUHL
2001
15 years 3 months ago
2001
Computer science educators have traditionally used algorithm visualization (AV) software to create graphical representations of algorithms that are later used as visual aids in lec...
115
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DAC
2009
ACM
15 years 7 months ago
2009
ACM
The progress of GPU (Graphics Processing Unit) technology opens a new avenue for boosting computing power. This work is an attempt to exploit GPU for accelerating VLSI circuit opt...