499 search results - page 34 / 100 » A Three-Phase Algorithm for Computer Aided siRNA Design |
102
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DAC
2008
ACM
16 years 3 months ago
2008
ACM
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
126
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GLVLSI
2002
IEEE
15 years 7 months ago
2002
IEEE
Many computation-intensive or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). ...
DAC
2003
ACM
16 years 3 months ago
2003
ACM
Exploring a large portion of the microprocessor design space requires the rapid development of efficient simulators. While some systems support rapid model development through the...
231
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DAC
2011
ACM
14 years 2 months ago
2011
ACM
In this paper, a new sparse approximation technique is proposed for incremental power grid analysis. Our proposed method is motivated by the observation that when a power grid net...
122
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DAC
2004
ACM
16 years 3 months ago
2004
ACM
A tool that automates the floating-point to fixed-point conversion (FFC) process for digital signal processing systems is described. The tool automatically optimizes fixed-point d...