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» A Three-Phase Algorithm for Computer Aided siRNA Design
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FPGA
2003
ACM
125views FPGA» more  FPGA 2003»
15 years 7 months ago
I/O placement for FPGAs with multiple I/O standards
In this paper, we present the first exact algorithm to solve the constrained I/O placement problem for FPGAs that support multiple I/O standards. We derive a compact integer line...
Wai-Kei Mak
185
Voted
VRML
2003
ACM
15 years 7 months ago
3D virtual clothing: from garment design to web3d visualization and simulation
One of the major challenges in Computer Graphics concerns the 3D representation and physically-based simulation of garments. In our research, we are working closely with the texti...
Luca Chittaro, Demis Corvaglia
ICCAD
2009
IEEE
117views Hardware» more  ICCAD 2009»
15 years 6 days ago
Binning optimization based on SSTA for transparently-latched circuits
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
Min Gong, Hai Zhou, Jun Tao, Xuan Zeng
DAC
2005
ACM
16 years 3 months ago
Temperature-aware resource allocation and binding in high-level synthesis
Physical phenomena such as temperature have an increasingly important role in performance and reliability of modern process technologies. This trend will only strengthen with futu...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
GLVLSI
2009
IEEE
125views VLSI» more  GLVLSI 2009»
15 years 9 months ago
Timing-driven N-way decomposition
Logic decomposition has been extensively used to optimize the worst-case delay and the area in the technology independent phase. Bi-decomposition is one of the state-of-art techni...
David Bañeres, Jordi Cortadella, Michael Ki...