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» A Three-Phase Algorithm for Computer Aided siRNA Design
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DAC
2008
ACM
16 years 3 months ago
Topological routing to maximize routability for package substrate
Compared with on-chip routers, the existing commercial tools for off-chip routing have a much lower routability and often result in a large number of unrouted nets for manual rout...
Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He...
84
Voted
DAC
2009
ACM
16 years 3 months ago
Flip-chip routing with unified area-I/O pad assignments for package-board co-design
In this paper, we present a novel flip-chip routing algorithm for package-board co-design. Unlike the previous works that can consider only either free- or pre-assignment routing,...
Jia-Wei Fang, Martin D. F. Wong, Yao-Wen Chang
109
Voted
DAC
2002
ACM
16 years 3 months ago
Guaranteed passive balancing transformations for model order reduction
The major concerns in state-of-the-art model reduction algorithms are: achieving accurate models of sufficiently small size, numerically stable and efficient generation of the mod...
Joel R. Phillips, Luca Daniel, Luis Miguel Silveir...
120
Voted
SPAA
2003
ACM
15 years 7 months ago
On local algorithms for topology control and routing in ad hoc networks
An ad hoc network is a collection of wireless mobile hosts forming a temporary network without the aid of any fixed infrastructure. Indeed, an important task of an ad hoc network...
Lujun Jia, Rajmohan Rajaraman, Christian Scheidele...
123
Voted
DAC
2010
ACM
15 years 6 months ago
Eyecharts: constructive benchmarking of gate sizing heuristics
—Discrete gate sizing is one of the most commonly used, flexible, and powerful techniques for digital circuit optimization. The underlying problem has been proven to be NP-hard ...
Puneet Gupta, Andrew B. Kahng, Amarnath Kasibhatla...