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» A Three-Phase Algorithm for Computer Aided siRNA Design
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ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
15 years 11 months ago
From molecular interactions to gates: a systematic approach
The continuous minituarization of integrated circuits may reach atomic scales in a couple of decades. Some researchers have already built simple computation engines by manipulatin...
Josep Carmona, Jordi Cortadella, Yousuke Takada, F...
SMA
2008
ACM
192views Solid Modeling» more  SMA 2008»
15 years 28 days ago
Identification of sections from engineering drawings based on evidence theory
View identification is the basal process for solid reconstruction from engineering drawings. A new method is presented to label various views from a section-involved drawing and i...
Jie-Hui Gong, Hui Zhang, Bin Jiang, Jia-Guang Sun
DAC
2005
ACM
16 years 3 months ago
A low latency router supporting adaptivity for on-chip interconnects
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
Jongman Kim, Dongkook Park, Theo Theocharides, Nar...
DAC
2004
ACM
15 years 6 months ago
Enabling energy efficiency in via-patterned gate array devices
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architecture...
R. Reed Taylor, Herman Schmit
112
Voted
DAC
2005
ACM
16 years 3 months ago
Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubn...