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» A Three-Phase Algorithm for Computer Aided siRNA Design
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122
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DAC
2003
ACM
16 years 3 months ago
Support vector machines for analog circuit performance representation
The use of Support Vector Machines (SVMs) to represent the performance space of analog circuits is explored. In abstract terms, an analog circuit maps a set of input design parame...
Fernando De Bernardinis, Michael I. Jordan, Albert...
105
Voted
DAC
2007
ACM
16 years 3 months ago
On-The-Fly Resolve Trace Minimization
The ability of modern SAT solvers to produce proofs of unsatisfiability for Boolean formulas has become a powerful tool for EDA applications. Proofs are generated from a resolve t...
Ohad Shacham, Karen Yorav
124
Voted
ISPD
2006
ACM
175views Hardware» more  ISPD 2006»
15 years 8 months ago
mPL6: enhanced multilevel mixed-size placement
The multilevel placement package mPL6 combines improved implementations of the global placer mPL5 (ISPD05) and the XDP legalizer and detailed placer (ASPDAC06). It consistently pr...
Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kent...
104
Voted
ISPD
2006
ACM
102views Hardware» more  ISPD 2006»
15 years 8 months ago
A faster implementation of APlace
APlace is a high quality, scalable analytical placer. This paper describes our recent efforts to improve APlace for speed and scalability. We explore various wirelength and densi...
Andrew B. Kahng, Qinke Wang
111
Voted
ISTA
2007
15 years 3 months ago
Intelligent System for Computer-assisted Clinical Cancer Image Analysis
: We present CaDiS - a new multimedia medical workstation, which helps early and precise diagnosis and treatment of cervical cancer. The workstation is developed with the close par...
Anatoly N. Bondarenko, Andrei V. Katsuk