499 search results - page 65 / 100 » A Three-Phase Algorithm for Computer Aided siRNA Design |
GLVLSI
2003
IEEE
15 years 5 months ago
2003
IEEE
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
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DAC
2004
ACM
15 years 3 months ago
2004
ACM
The performance of timing-driven placement methods depends strongly on the choice of the net model. In this paper a more precise net model is presented that does not increase nume...
DAC
2005
ACM
15 years 1 months ago
2005
ACM
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
DAC
2009
ACM
16 years 24 days ago
2009
ACM
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
DAC
2005
ACM
16 years 23 days ago
2005
ACM
Input vector control (IVC) technique utilizes the stack effect in CMOS circuit to apply the minimum leakage vector (MLV) to the circuit at the sleep mode to reduce leakage. Additi...