499 search results - page 70 / 100 » A Three-Phase Algorithm for Computer Aided siRNA Design |
DAC
2003
ACM
15 years 10 months ago
2003
ACM
This paper presents a power grid analyzer based on a random walk technique. A linear-time algorithm is first demonstrated for DC analysis, and is then extended to perform transien...
DAC
2009
ACM
15 years 4 months ago
2009
ACM
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
DAC
2003
ACM
15 years 2 months ago
2003
ACM
In this paper we propose a partitioning-based placement algorithm for FPGAs. The method incorporates simple, but effective heuristics that target delay minimization. The placement...
DAC
2010
ACM
14 years 9 months ago
2010
ACM
We study diagnosis of segments on speedpaths that fail the timing constraint at the post-silicon stage due to manufacturing variations. We propose a formal procedure that is appli...
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DAC
2007
ACM
15 years 10 months ago
2007
ACM
In this paper, we propose TROY, the first track router with yield-driven wire planning to optimize yield loss due to random defects. As the probability of failure (POF) computed f...