Sciweavers

499 search results - page 75 / 100
» A Three-Phase Algorithm for Computer Aided siRNA Design
Sort
View
DAC
2009
ACM
15 years 10 months ago
Thermal-driven analog placement considering device matching
With the thermal effect, improper analog placements may degrade circuit performance because the thermal impact from power devices can affect electrical characteristics of the ther...
Po-Hung Lin, Hongbo Zhang, Martin D. F. Wong, Yao-...
DAC
2009
ACM
15 years 10 months ago
SRAM parametric failure analysis
With aggressive technology scaling, SRAM design has been seriously challenged by the difficulties in analyzing rare failure events. In this paper we propose to create statistical ...
Jian Wang, Soner Yaldiz, Xin Li, Lawrence T. Pileg...
DAC
2007
ACM
15 years 10 months ago
PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels
Abstract-- The PPV is a robust phase domain macromodel for oscillators. It has been proven to predict oscillators' responses correctly under small signal perturbations, and ca...
Zhichun Wang, Xiaolue Lai, Jaijeet S. Roychowdhury
DAC
2006
ACM
15 years 10 months ago
Transistor abstraction for the functional verification of FPGAs
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
Guy Dupenloup, Thierry Lemeunier, Roland Mayr
GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
15 years 2 months ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden