Sciweavers

499 search results - page 84 / 100
» A Three-Phase Algorithm for Computer Aided siRNA Design
Sort
View
DAC
2010
ACM
14 years 4 months ago
Node addition and removal in the presence of don't cares
This paper presents a logic restructuring technique named node addition and removal (NAR). It works by adding a node into a circuit to replace an existing node and then removing t...
Yung-Chih Chen, Chun-Yao Wang
IJRR
2010
159views more  IJRR 2010»
14 years 4 months ago
Vision-guided Robot System for Picking Objects by Casting Shadows
We present a complete vision guided robot system for model based 3D pose estimation and picking of singulated 3D objects. Our system employs a novel vision sensor consisting of a ...
Amit Agrawal, Yu Sun, John Barnwell, Ramesh Raskar
IEEEPACT
2006
IEEE
15 years 3 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
DAC
2007
ACM
15 years 10 months ago
Fast Second-Order Statistical Static Timing Analysis Using Parameter Dimension Reduction
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part of nanometer VLSI design. Under the context of ti...
Zhuo Feng, Peng Li, Yaping Zhan
DAC
2005
ACM
15 years 10 months ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...