499 search results - page 86 / 100 » A Three-Phase Algorithm for Computer Aided siRNA Design |
DAC
2009
ACM
15 years 10 months ago
2009
ACM
In double patterning lithography (DPL), coloring conflict and stitch minimization are the two main challenges. Post layout decomposition algorithm [1] [2]may not be enough to achi...
ISPD
2003
ACM
15 years 2 months ago
2003
ACM
In 21st-Century VLSI design, clocking plays crucial roles for both performance and timing convergence. Due to their non-convex nature, optimal minimum-delay/area zero-skew wire-si...
VRML
1999
ACM
15 years 1 months ago
1999
ACM
VRML is a file format for the description of dynamic scene graphs containing 3D objects with their visual appearance, multimedia content, an event model, and scripting capabilitie...
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Voted
GLVLSI
2008
IEEE
15 years 3 months ago
2008
IEEE
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
tive Guidance Strategy for Abstraction-Guided Simulation Flavio M. De Paula Alan J. Hu Department of Computer Science, University of British Columbia, {depaulfm, ajh}@cs.ubc.ca D...