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DATE
2003
IEEE
180views Hardware» more  DATE 2003»
13 years 11 months ago
Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors
Software implementations of channel decoding algorithms are attractive for communication systems with their large variety of existing and emerging standards due to their flexibil...
Frank Gilbert, Michael J. Thul, Norbert Wehn
EUROPAR
2009
Springer
14 years 25 days ago
A Case Study of Communication Optimizations on 3D Mesh Interconnects
Optimal network performance is critical to efficient parallel scaling for communication-bound applications on large machines. With wormhole routing, no-load latencies do not increa...
Abhinav Bhatele, Eric J. Bohm, Laxmikant V. Kal&ea...
BMCBI
2011
13 years 1 months ago
A lightweight, flow-based toolkit for parallel and distributed bioinformatics pipelines
Background: Bioinformatic analyses typically proceed as chains of data-processing tasks. A pipeline, or ‘workflow’, is a well-defined protocol, with a specific structure defin...
Marcin Cieslik, Cameron Mura
ICPP
2009
IEEE
14 years 28 days ago
Speeding Up Distributed MapReduce Applications Using Hardware Accelerators
—In an attempt to increase the performance/cost ratio, large compute clusters are becoming heterogeneous at multiple levels: from asymmetric processors, to different system archi...
Yolanda Becerra, Vicenç Beltran, David Carr...
PARELEC
2002
IEEE
13 years 11 months ago
Dynamic Process Partitioning and Migration for Irregular Applications
Many practical applications generate irregular, nonbalanced divide-and-conquer trees which have different depths, possibly also different numbers of successors at different levels...
Pawel Czarnul