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IPSN
2010
Springer
15 years 10 months ago
High-resolution, low-power time synchronization an oxymoron no more
We present Virtual High-resolution Time (VHT), a powerproportional time-keeping service that offers a baseline power draw of a low-speed clock (e.g. 32 kHz crystal), but provides...
Thomas Schmid, Prabal Dutta, Mani B. Srivastava
FPL
2006
Springer
147views Hardware» more  FPL 2006»
15 years 6 months ago
Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips
Emerging embedded System-on-Chip (SoC) platforms are increasingly becoming multiprocessor architectures. The advances in the FPGA chip technology make the implementation of such a...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
DAC
2006
ACM
15 years 9 months ago
Buffer memory optimization for video codec application modeled in Simulink
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Ami...
SAFECOMP
2010
Springer
15 years 1 months ago
Reliability Analysis of Safety-Related Communication Architectures
Abstract. In this paper we describe a novel concept for reliability analysis of communication architectures in safety-critical systems. This concept has been motivated by applicati...
Oliver Schulz, Jan Peleska
ATAL
2005
Springer
15 years 8 months ago
TACOP: a cognitive agent for a naval training simulation environment
This paper describes how cognitive modeling can be exploited in the design of software agents that support naval training sessions. The architecture, specifications, and embedding...
Willem A. van Doesburg, Annerieke Heuvelink, Egon ...