Sciweavers

1735 search results - page 258 / 347
» A Timed Multitasking Architecture for Distributed Embedded S...
Sort
View
WWW
2003
ACM
16 years 3 months ago
SHOCK: communicating with computational messages and automatic private profiles
A computationally enhanced message contains some embedded programmatic components that are interpreted and executed automatically upon receipt. Unlike ordinary text email or insta...
Rajan M. Lukose, Eytan Adar, Joshua R. Tyler, Caes...
SAMOS
2007
Springer
15 years 9 months ago
Online Prediction of Applications Cache Utility
— General purpose architectures are designed to offer average high performance regardless of the particular application that is being run. Performance and power inefficiencies a...
Miquel Moretó, Francisco J. Cazorla, Alex R...
ANCS
2007
ACM
15 years 7 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
FOCI
2007
IEEE
15 years 9 months ago
Random Hypergraph Models of Learning and Memory in Biomolecular Networks: Shorter-Term Adaptability vs. Longer-Term Persistency
Recent progress in genomics and proteomics makes it possible to understand the biological networks at the systems level. We aim to develop computational models of learning and memo...
Byoung-Tak Zhang
CODES
2004
IEEE
15 years 6 months ago
Benchmark-based design strategies for single chip heterogeneous multiprocessors
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs trad...
JoAnn M. Paul, Donald E. Thomas, Alex Bobrek