1735 search results - page 78 / 347 » A Timed Multitasking Architecture for Distributed Embedded S... |
HPCC
2007
Springer
15 years 9 months ago
2007
Springer
We propose a model for describing the parallel performance of multigrid software on distributed memory architectures. The goal of the model is to allow reliable predictions to be m...
112
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MICRO
2007
IEEE
15 years 9 months ago
2007
IEEE
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...
146
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TII
2010
14 years 9 months ago
2010
Abstract--CPU utilization control has recently been demonstrated to be an effective way of meeting end-to-end deadlines for distributed real-time systems running in unpredictable e...
136
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IPPS
2000
IEEE
15 years 6 months ago
2000
IEEE
Performance analysis of high performance systems is a difficult task. Current tools have proven successful in analysis tasks but their implementation is limited in several respects...
133
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SAC
2009
ACM
15 years 9 months ago
2009
ACM
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...