8 search results - page 1 / 2 » A Timing-Driven Algorithm for Leakage Reduction in MTCMOS FP... |
49
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ASPDAC
2007
ACM
15 years 2 months ago
2007
ACM
FPL
2004
Springer
15 years 3 months ago
2004
Springer
Traditional placement algorithms for FPGAs are normally carried out on a fixed clustering solution of a circuit. The impact of clustering on wirelength and delay of the placement s...
105
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GLVLSI
2007
IEEE
15 years 4 months ago
2007
IEEE
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
FPGA
2004
ACM
15 years 3 months ago
2004
ACM
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
In this paper, two packing algorithms for the detection of activity profiles in MTCMOS-based FPGA structures are proposed for leakage power mitigation. The first algorithm is a ...