39 search results - page 3 / 8 » A Top-Down Design Environment for Developing Pipelined Datap... |
VLSID
2007
IEEE
14 years 6 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
DATE
2004
IEEE
13 years 10 months ago
2004
IEEE
This paper presents a versatile hardware/software cosimulation and co-design environment for embedded 3D graphics accelerators. The GRAphics AcceLerator design exploration framewo...
FCCM
2008
IEEE
14 years 28 days ago
2008
IEEE
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
SBCCI
2009
ACM
14 years 1 months ago
2009
ACM
The purpose of this work is the proposal of a 10-Bit / 1 MSPS Analog to Digital Converter (ADC) with error correction to match the requirements of a CMOS wavefront sensor for opht...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
: A modern special-purpose processor (e.g., for image and graphical applications) usually contains a set of instructions supporting complex multiply-operations. These instructions ...