We recently introduced symbolic timing simulation (STS) using data-dependent delays as a tool for verifying the timing of fullcustom transistor-level circuit designs, and for the ...
Abstract—In Network-on-Chip (NoC) application design, coreto-node mapping is an important but intractable optimization problem. In the paper, we use simulated annealing to tackle...
Combining simulations of different scale in one application is non-trivial issue. This paper proposes solution that supports complex time interactions that can appear between elem...
The use of simulation for a pedagogical purpose is very interesting. One of the essential repercussions of the construction of a pedagogical simulator is the perennisation of the â...
The authors present an approach for implementing a system for the assessment of medical competences using a haptic simulation device. Based on Competence based Knowledge Space Theo...
Cord Hockemeyer, Alexander Nussbaumer, Erik Lö...