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67
Voted
ISSS
2002
IEEE
15 years 5 months ago
2002
IEEE
This paper proposes an original model of the execution time of assembly instructions in superscalar architectures. The approach is based on a rigorous mathematical model and provi...
102
Voted
VLSID
2000
IEEE
15 years 5 months ago
2000
IEEE
A methodology for reducing ground bounce in typical microprocessors and image processing architectures has been described. As we approach Gigascale Integration, chip power consump...
DATE
2006
IEEE
15 years 6 months ago
2006
IEEE
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
117
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PATMOS
2000
Springer
15 years 4 months ago
2000
Springer
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
120
Voted
COMCOM
2006
15 years 22 days ago
2006
There exists a high demand for reliable, high capacity underwater acoustic networks to allow efficient data gathering and information exchange. This is evidenced by significant re...