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103
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AHS
2006
IEEE
152views Hardware» more  AHS 2006»
15 years 6 months ago
Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) architecture that has been proposed for reconfigurable Multiprocessor system-on-chip ...
Balal Ahmad, Ahmet T. Erdogan, Sami Khawam
75
Voted
ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
15 years 6 months ago
A high performance distributed-parallel-processor architecture for 3D IIR digital filters
—Real-time spatio-temporal VLSI 3D IIR digital filters may be used for imaging or beamforming applications employing 3D input signals from synchronously-sampled multi-sensor arra...
Arjuna Madanayake, Leonard T. Bruton
104
Voted
ICRA
2002
IEEE
124views Robotics» more  ICRA 2002»
15 years 5 months ago
Open Architecture Humanoid Robotics Platform
This paper introduces an open architecture humanoid robotics platform (OpenHRP for short) on which various building blocks of humanoid robotics can be investigated. OpenHRP is a v...
Fumio Kanehiro, Kiyoshi Fujiwara, Shuuji Kajita, K...
93
Voted
ISLPED
1999
ACM
84views Hardware» more  ISLPED 1999»
15 years 5 months ago
An architectural solution for the inductive noise problem due to clock-gating
As we approach Gigascale Integration, chip power consumption is becoming a critical system parameter. Clock-gating idle units provides needed reductions in power consumption. Howe...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Viv...
133
Voted
DSRT
2008
IEEE
15 years 2 months ago
An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture
Most common real-time embedded programming languages provide a means to specify functionality; however, they have few constructs to specify precise timing constraints. LabVIEW is ...
Shanna-Shaye Forbes, Hiren D. Patel, Edward A. Lee...