Sciweavers

3955 search results - page 739 / 791
» A Transactional Architecture for Simulation
Sort
View
IEEEPACT
2009
IEEE
15 years 6 months ago
SHIP: Scalable Hierarchical Power Control for Large-Scale Data Centers
In today’s data centers, precisely controlling server power consumption is an essential way to avoid system failures caused by power capacity overload or overheating due to incr...
Xiaorui Wang, Ming Chen, Charles Lefurgy, Tom W. K...
IEEEPACT
2009
IEEE
15 years 6 months ago
Quantifying the Potential of Program Analysis Peripherals
Abstract—As programmers are asked to manage more complicated parallel machines, it is likely that they will become increasingly dependent on tools such as multi-threaded data rac...
Mohit Tiwari, Shashidhar Mysore, Timothy Sherwood
IISWC
2009
IEEE
15 years 6 months ago
SD-VBS: The San Diego Vision Benchmark Suite
—In the era of multi-core, computer vision has emerged as an exciting application area which promises to continue to drive the demand for both more powerful and more energy effi...
Sravanthi Kota Venkata, Ikkjin Ahn, Donghwan Jeon,...
IPPS
2009
IEEE
15 years 6 months ago
Handling OS jitter on multicore multithreaded systems
Various studies have shown that OS jitter can degrade parallel program performance considerably at large processor counts. Most sources of system jitter fall broadly into 5 catego...
Pradipta De, Vijay Mann, Umang Mittaly
MICRO
2009
IEEE
113views Hardware» more  MICRO 2009»
15 years 6 months ago
The BubbleWrap many-core: popping cores for sequential acceleration
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly i...
Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas