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» A Two-Phase Process for Software Architecture Improvement
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EUROSYS
2007
ACM
14 years 11 months ago
Enabling scalability and performance in a large scale CMP environment
Hardware trends suggest that large-scale CMP architectures, with tens to hundreds of processing cores on a single piece of silicon, are iminent within the next decade. While exist...
Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghul...
ICS
2010
Tsinghua U.
15 years 2 days ago
InterferenceRemoval: removing interference of disk access for MPI programs through data replication
As the number of I/O-intensive MPI programs becomes increasingly large, many efforts have been made to improve I/O performance, on both software and architecture sides. On the sof...
Xuechen Zhang, Song Jiang
COMPSAC
2009
IEEE
15 years 1 months ago
On a Classification Approach for SOA Vulnerabilities
Abstract--Vulnerabilities in operating systems and web applications have been and are being put into various classifications, leading to a better understanding of their causes and ...
Lutz Lowis, Rafael Accorsi
DAC
2008
ACM
15 years 10 months ago
Multiprocessor performance estimation using hybrid simulation
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...
CODES
2004
IEEE
15 years 1 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis