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» A Utile Function Optimizer
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ASPDAC
2000
ACM
159views Hardware» more  ASPDAC 2000»
15 years 8 months ago
Analytical minimization of half-perimeter wirelength
Global placement of hypergraphs is critical in the top-down placement of large timing-driven designs 10, 16 . Placement quality is evaluated in terms of the half-perimeter wirelen...
Andrew A. Kennings, Igor L. Markov
DATE
2010
IEEE
140views Hardware» more  DATE 2010»
15 years 8 months ago
Construction of dual mode components for reconfiguration aware high-level synthesis
High-level synthesis has recently started to gain industrial acceptance, due to the improved quality of results and the multi-objective optimizations offered. One optimization area...
George Economakos, Sotirios Xydis, Ioannis Koutras...
DATE
1999
IEEE
129views Hardware» more  DATE 1999»
15 years 8 months ago
Battery-Powered Digital CMOS Design
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
Massoud Pedram, Qing Wu
SIGIR
2010
ACM
15 years 7 months ago
Prototype hierarchy based clustering for the categorization and navigation of web collections
This paper presents a novel prototype hierarchy based clustering (PHC) framework for the organization of web collections. It solves simultaneously the problem of categorizing web ...
Zhaoyan Ming, Kai Wang, Tat-Seng Chua
FGR
2004
IEEE
218views Biometrics» more  FGR 2004»
15 years 7 months ago
Affine Correspondence Based Head Pose Estimation for a Sequence of Images by Using a 3D Model
This paper proposes a method of determining human head poses from a sequence of images. The main idea is to use some features in a 3D head model to generate a virtual fronto-paral...
Guoyuan Liang, Hongbin Zha, Hong Liu