74 search results - page 11 / 15 » A VHDL-based bus model for multi-PCB system design |
103
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DATE
2004
IEEE
15 years 3 months ago
2004
IEEE
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
ICCAD
2002
IEEE
15 years 8 months ago
2002
IEEE
This paper presents a way of encoding some kinds of dynamic reconfiguration behaviour in the interface portion of circuit descriptions. This has many advantages. The user of a rec...
112
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CODES
2007
IEEE
15 years 6 months ago
2007
IEEE
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of n...
ASPDAC
2009
ACM
15 years 6 months ago
2009
ACM
Abstract— This paper presents synthesis of Hardware Dependent Software (HdS) for multicore and many-core designs using Embedded System Environment (ESE). ESE is a tool set, devel...
116
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CODES
2003
IEEE
15 years 4 months ago
2003
IEEE
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...