74 search results - page 9 / 15 » A VHDL-based bus model for multi-PCB system design |
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PATMOS
2004
Springer
15 years 5 months ago
2004
Springer
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
CIIT
2004
15 years 1 months ago
2004
In control systems the jitter is a major problem since in a time-varying system the theoretical results for analysis and design of time-invariant systems cannot be used directly. ...
FDL
2005
IEEE
15 years 5 months ago
2005
IEEE
Verification and validation are key issues for today's SoC design projects. This paper presents the implementation of a SystemC based environment for transaction-based verifi...
ICCAD
2003
IEEE
15 years 8 months ago
2003
IEEE
Recent efforts in adapting computer networks into system-on-chip (SOC), or network-on-chip, present a setback to the traditional computer systems for the lack of effective program...
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RTAS
2008
IEEE
15 years 6 months ago
2008
IEEE
Message Sequence Charts (MSCs) are widely used for describing interaction scenarios between the components of a distributed system. Consequently, worst-case response time estimati...