614 search results - page 90 / 123 » A Variable Rate Execution Model |
VISUALIZATION
1997
IEEE
15 years 1 months ago
1997
IEEE
Terrain visualization is a difficult problem for applications requiring accurate images of large datasets at high frame rates, such as flight simulation and ground-based aircraf...
TC
1998
14 years 9 months ago
1998
—High instruction cache hit rates are key to high performance. One known technique to improve the hit rate of caches is to minimize cache interference by improving the layout of ...
105
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HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...
106
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TPDS
2008
14 years 9 months ago
2008
This paper presents the Mitosis framework, which is a combined hardware-software approach to speculative multithreading, even in the presence of frequent dependences among threads....
ET
2007
14 years 9 months ago
2007
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...