Sciweavers

358 search results - page 3 / 72
» A Verification Methodology for Model Fields
Sort
View
WWW
2006
ACM
14 years 7 months ago
A framework for XML data streams history checking and monitoring
The need of formal verification is a problem that involves all the fields in which sensible data are managed. In this context the verification of data streams became a fundamental...
Alessandro Campi, Paola Spoletini
DAC
1997
ACM
13 years 9 months ago
Formal Verification of FIRE: A Case Study
We present our experiences with the formal verification of an automotive chip used to control the safety features in a car. We used a BDD based model checker in our work. We descr...
Jae-Young Jang, Shaz Qadeer, Matt Kaufmann, Carl P...
FPL
2006
Springer
103views Hardware» more  FPL 2006»
13 years 10 months ago
A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification
This paper provides a realistic case study of using the previously introduced SIMPPL system architectural model, which fixes the physical interface and communication protocols bet...
Lesley Shannon, Blair Fort, Samir Parikh, Arun Pat...
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
13 years 10 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
FMSD
2002
128views more  FMSD 2002»
13 years 6 months ago
Combining Software and Hardware Verification Techniques
Combining verification methods developed separately for software and hardware is motivated by the industry's need for a technology that would make formal verification of reali...
Robert P. Kurshan, Vladimir Levin, Marius Minea, D...