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» A Visual Approach to Validating System Level Designs
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126
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FMCAD
2007
Springer
15 years 7 months ago
Circuit Level Verification of a High-Speed Toggle
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...
Chao Yan, Mark R. Greenstreet
150
Voted
FPL
2009
Springer
179views Hardware» more  FPL 2009»
15 years 7 months ago
Building heterogeneous reconfigurable systems using threads
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a software-like...
Jason Agron, David L. Andrews
125
Voted
DATE
2004
IEEE
136views Hardware» more  DATE 2004»
15 years 7 months ago
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems
Recently a lot of multimedia applications are emerging on portable appliances. They require both the flexibility of upgradeable devices (traditionally software based) and a powerf...
Michele Borgatti, Andrea Capello, Umberto Rossi, J...
96
Voted
COMPSAC
1998
IEEE
15 years 7 months ago
A Fresh Look at Programming-in-the-Large
Realizing a shift of software engineering towards a component-based approach to software development requires the development of higher level programming systems supporting the de...
Walter Cazzola, Andrea Savigni, Andrea Sosio, Fran...
162
Voted
PAMI
2007
183views more  PAMI 2007»
15 years 2 months ago
Variational Surface Interpolation from Sparse Point and Normal Data
Many visual cues for surface reconstruction from known views are sparse in nature, e.g. specularities, surface silhouettes and salient features in an otherwise textureless region....
Jan Erik Solem, Henrik Aanæs, Anders Heyden