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» A Visual Approach to Validating System Level Designs
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ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 9 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
163
Voted
PVLDB
2010
168views more  PVLDB 2010»
15 years 2 months ago
Transforming XML Documents as Schemas Evolve
Database systems often use XML schema to describe the format of valid XML documents. Usually, this format is determined when the system is designed. Sometimes, in an already funct...
Jarek Gryz, Marcin Kwietniewski, Stephanie Hazlewo...
WSCG
2003
177views more  WSCG 2003»
15 years 5 months ago
Efficient NURBS Rendering using View-Dependent LOD and Normal Maps
Rendering large trimmed NURBS models with high quality at interactive frame rates is of great interest for industry, since nearly all their models are designed on the basis of thi...
Michael Guthe, Reinhard Klein
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
15 years 10 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
SIBGRAPI
2005
IEEE
15 years 9 months ago
Particle Filter-Based Predictive Tracking for Robust Fish Counting
In this paper we study the use of computer vision techniques for for underwater visual tracking and counting of fishes in vivo. The methodology is based on the application of a B...
Erikson F. Morais, Mario Fernando Montenegro Campo...