Sciweavers

2695 search results - page 325 / 539
» A Visual Approach to Validating System Level Designs
Sort
View
TECS
2008
119views more  TECS 2008»
15 years 3 months ago
Fast exploration of bus-based communication architectures at the CCATB abstraction
straction SUDEEP PASRICHA and NIKIL DUTT University of California, Irvine and MOHAMED BEN-ROMDHANE Newport Media Inc. Currently, system-on-chip (SoC) designs are becoming increasin...
Sudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane
151
Voted
IWCC
1999
IEEE
15 years 8 months ago
Single I/O Space for Scalable Cluster Computing
In this paper, we propose a novel Single I/O Space architecture for achieving a Single System Image (SSI) at the I/O subsystem level. This is very much desired in a scalable clust...
Roy S. C. Ho, Hai Jin, Kai Hwang
150
Voted
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
16 years 4 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
146
Voted
ICINCO
2004
165views Robotics» more  ICINCO 2004»
15 years 5 months ago
Active Sensing Strategies for Robotic Platforms, with an Application in Vision-Based Gripping
: We present a vision-based robotic system which uses a combination of several active sensing strategies to grip a free-standing small target object with an initially unknown posit...
Benjamin Deutsch, Frank Deinzer, Matthias Zobel, J...
WSC
2000
15 years 5 months ago
Product-mix analysis with Discrete Event Simulation
Discrete Event Simulation (DES) has been used as a design and validation tool in various production and business applications. DES can also be utilized for analyzing the product-m...
Raid Al-Aomar