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» A Visual Approach to Validating System Level Designs
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ECAL
2003
Springer
15 years 5 months ago
Low-Level Visual Homing
Abstract. We present a variant of the snapshot model [1] for insect visual homing. In this model a snapshot image is taken by an agent at the goal position. The disparity between c...
Andrew Vardy, Franz Oppacher
DATE
1998
IEEE
109views Hardware» more  DATE 1998»
15 years 4 months ago
Cross-Level Hierarchical High-Level Synthesis
This paper presents a new approach to cross-level hierarchical high-level synthesis. A methodology is presented, that supports the efficient synthesis of hierarchical specified sy...
Oliver Bringmann, Wolfgang Rosenstiel
EUROPAR
2006
Springer
15 years 3 months ago
Hierarchical Model Validation of Symbolic Performance Models of Scientific Kernels
Multi-resolution validation of hierarchical performance models of scientific applications is critical primarily for two reasons. First, the step-by-step validation determines the c...
Sadaf R. Alam, Jeffrey S. Vetter
IV
2005
IEEE
131views Visualization» more  IV 2005»
15 years 5 months ago
A Framework for Visualising Large Graphs
Visualising large graphs faces the challenges of both data complexity and visual complexity. This paper presents a framework for visualising large graphs that reduces data complex...
Wanchun Li, Seok-Hee Hong, Peter Eades
DATE
2004
IEEE
121views Hardware» more  DATE 2004»
15 years 3 months ago
Experiences during the Experimental Validation of the Time-Triggered Architecture
During last years, the Time-Triggered Architecture (TTA) has been gaining acceptance as a generic architecture for highly dependable real-time systems. It is now being used to imp...
Sara Blanc, Joaquin Gracia, Pedro J. Gil