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» A Visual Approach to Validating System Level Designs
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SBCCI
2009
ACM
131views VLSI» more  SBCCI 2009»
15 years 8 months ago
Twin logic gates: improved logic reliability by redundancy concerning gate oxide breakdown
Because of the aggressive scaling of integrated circuits and the given limits of atomic scales, circuit designers have to become more and more aware of the arising reliability and...
Hagen Sämrow, Claas Cornelius, Frank Sill, An...
HICSS
2007
IEEE
100views Biometrics» more  HICSS 2007»
15 years 9 months ago
Performance Analysis of a Middleware Demultiplexing Pattern
A key enabler of the recently adopted, assemblycentric development approach for distributed real-time software systems is QoS-enabled middleware, which provides reusable building ...
U. Praphamontripong, Swapna S. Gokhale, Aniruddha ...
WWW
2007
ACM
16 years 4 months ago
Csurf: a context-driven non-visual web-browser
Web sites are designed for graphical mode of interaction. Sighted users can "cut to the chase" and quickly identify relevant information in Web pages. On the contrary, i...
Jalal Mahmud, Yevgen Borodin, I. V. Ramakrishnan
ECBS
2004
IEEE
115views Hardware» more  ECBS 2004»
15 years 7 months ago
Supporting Evolutionary Development by Feature Models and Traceability Links
During their usage, software systems have to be changed constantly. If such changes are implemented in an incomplete or inconsistent way a loss of architectural quality will occur...
Matthias Riebisch
115
Voted
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
15 years 9 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk