636 search results - page 89 / 128 » A Web-Based P Systems Simulator and Its Parallelization |
146
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ICCD
1999
IEEE
15 years 8 months ago
1999
IEEE
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
131
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ISPAN
2005
IEEE
15 years 9 months ago
2005
IEEE
Most high-end switches use an input-queued or a combined input- and output-queued architecture. The switch fabrics of these architectures commonly use an iterative scheduling syst...
126
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IPPS
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
161
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IPPS
2002
IEEE
15 years 8 months ago
2002
IEEE
In this paper we propose an efficient real-time communication mechanism for distributed vision processing. One of the biggest problems of distributed vision processing, as is the ...
116
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SPAA
2003
ACM
15 years 9 months ago
2003
ACM
Previous implementations of out-of-core columnsort limit the problem size to N ≤ (M/P)3/2, where N is the number of records to sort, P is the number of processors, and M is the ...