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TC
2011
14 years 6 months ago
Software-Based Cache Coherence with Hardware-Assisted Selective Self-Invalidations Using Bloom Filters
— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing cohere...
Thomas J. Ashby, Pedro Diaz, Marcelo Cintra
KDD
2001
ACM
231views Data Mining» more  KDD 2001»
16 years 3 days ago
A Framework for Efficient and Anonymous Web Usage Mining Based on Client-Side Tracking
Web Usage Mining (WUM), a natural application of data mining techniques to the data collected from user interactions with the web, has greatly concerned both academia and industry ...
Cyrus Shahabi, Farnoush Banaei Kashani
SAC
2010
ACM
15 years 6 months ago
Asynchronous Byzantine consensus with 2f+1 processes
Byzantine consensus in asynchronous message-passing systems has been shown to require at least 3f + 1 processes to be solvable in several system models (e.g., with failure detecto...
Miguel Correia, Giuliana Santos Veronese, Lau Cheu...
IEEEPACT
2006
IEEE
15 years 5 months ago
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
CAV
1998
Springer
175views Hardware» more  CAV 1998»
15 years 4 months ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore