121 search results - page 19 / 25 » A cell-based power estimation in CMOS combinational circuits |
76
Voted
ICCAD
1995
IEEE
15 years 3 months ago
1995
IEEE
This paper describes two techniques to quantify energy consumption of burst-modeasynchronous(clock-less)controlcircuits. The circuit specifications consideredare extended burst-m...
ISCAS
2005
IEEE
15 years 5 months ago
2005
IEEE
Abstract— We designed a high-efficiency class-E switchedmode power amplifier for a wireless networked micro-sensors system. In this system, where each sensor operates using a mic...
88
Voted
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
107
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MJ
2007
14 years 11 months ago
2007
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
GLVLSI
2003
IEEE
15 years 4 months ago
2003
IEEE
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...