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» A cell-based power estimation in CMOS combinational circuits
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TVLSI
1998
81views more  TVLSI 1998»
13 years 5 months ago
Maximum power estimation for CMOS circuits using deterministic and statistical approaches
— Excessive instantaneous power consumption may reduce the reliability and performance of VLSI chips. Hence, to synthesize circuits with high reliability, it is imperative to efï...
Chuan-Yu Wang, Kaushik Roy
ISLPED
1996
ACM
110views Hardware» more  ISLPED 1996»
13 years 10 months ago
Statistical estimation of average power dissipation in CMOS VLSI circuits using nonparametric techniques
In this paper, we present a new statistical technique for estimation of average power dissipation in digital circuits. Present statistical techniques estimate the average power ba...
Li-Pen Yuan, Chin-Chi Teng, Sung-Mo Kang
ISQED
2003
IEEE
75views Hardware» more  ISQED 2003»
13 years 11 months ago
Quantifying Error in Dynamic Power Estimation of CMOS Circuits
Puneet Gupta, Andrew B. Kahng
DATE
1997
IEEE
70views Hardware» more  DATE 1997»
13 years 10 months ago
Fast power loss calculation for digital static CMOS circuits
: In this paper, we present a new dynamic power estimation method that produces accurate power measures at considerably faster run times. The approach uses an enhanced switch-level...
Sergey Gavrilov, Alexey Glebov, S. Rusakov, David ...
ICCAD
1994
IEEE
115views Hardware» more  ICCAD 1994»
13 years 10 months ago
Fast transient power and noise estimation for VLSI circuits
Abstract - Today's digital design systems are running out of steam, when it comes to meeting the challenges presented by simultaneous switching, power consumption and reliabil...
Wolfgang T. Eisenmann, Helmut E. Graeb