172 search results - page 9 / 35 » A classification of design steps and their verification |
ICCAD
2010
IEEE
14 years 7 months ago
2010
IEEE
1In this paper, we will present an effective layout method for analog circuits. We consider symmetry constraint, common centroid constraint, device merging and device clustering du...
DAC
2009
ACM
15 years 10 months ago
2009
ACM
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to ...
SIPS
2006
IEEE
15 years 3 months ago
2006
IEEE
Low-Density Parity-Check (LDPC) codes have been adopted in the physical layer of many communication systems because of their superior performance. The direct implementation of the...
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FAC
2007
14 years 9 months ago
2007
Abstract. The Verifying Compiler (VC) project proposals suggest that mainstream software developers are its targeted end-users. Like other software engineering efforts, the VC proj...
ACSW
2006
14 years 11 months ago
2006
Formal specification and verification of protocols have been credited for uncovering protocol flaws; revealing inadequacies in protocol design of the Initial Stage and Negotiation...