38 search results - page 5 / 8 » A compiler-directed data prefetching scheme for chip multipr... |
HPCA
2003
IEEE
15 years 10 months ago
2003
IEEE
Scalability of applications on distributed sharedmemory (DSM) multiprocessors is limited by communication overheads. At some point, using more processors to increase parallelism y...
84
Voted
ISCA
2008
IEEE
15 years 3 months ago
2008
IEEE
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
DATE
2006
IEEE
15 years 1 months ago
2006
IEEE
In current multi-media systems major parts of the functionality consist of software tasks executed on a set of concurrently operating processors. Those tasks interfere with each o...
ISCA
2010
IEEE
15 years 2 months ago
2010
IEEE
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
DSN
2007
IEEE
15 years 3 months ago
2007
IEEE
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...