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» A component model for building systems software
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MEMOCODE
2003
IEEE
15 years 4 months ago
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, ...
SEW
2005
IEEE
15 years 4 months ago
Using Visualization to Understand Dependability: A Tool Support for Requirements Analysis
Dealing with dependability requirements is a complex task for stakeholders and analysts as many different aspects of a system must be taken into account at the same time: services...
Paolo Donzelli, Daniel Hirschbach, Victor R. Basil...
CODES
2004
IEEE
15 years 2 months ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
CSUR
2000
78views more  CSUR 2000»
14 years 10 months ago
Developing flexible and high-performance Web servers with frameworks and patterns
The goal of this paper is to illustrate how frameworks and patterns address complexities that arise in the design and implementation of high-performance distributed software syste...
Douglas C. Schmidt, James C. Hu
ICSE
2007
IEEE-ACM
15 years 10 months ago
Supporting Heterogeneous Architecture Descriptions in an Extensible Toolset
Many architecture description languages (ADLs) have been proposed to model, analyze, configure, and deploy complex software systems. To face this diversity, extensible ADLs (or AD...
Ali Erdem Özcan, Jean-Bernard Stefani, Matthi...