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DSN
2007
IEEE
15 years 3 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
EUROSYS
2010
ACM
15 years 6 months ago
A Comprehensive Scheduler for Asymmetric Multicore Systems
Symmetric-ISA (instruction set architecture) asymmetricperformance multicore processors were shown to deliver higher performance per watt and area for codes with diverse architect...
Juan Carlos Saez, Manuel Prieto Matias, Alexandra ...
CASES
2007
ACM
15 years 1 months ago
Application driven embedded system design: a face recognition case study
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
Karthik Ramani, Al Davis
SIGPLAN
2002
14 years 9 months ago
A rule-based language for programming software updates
We describe the design of a rule-based language for expressing changes to Haskell programs in a systematic and reliable way. The update language essentially offers update commands...
Martin Erwig, Deling Ren
RTAS
1998
IEEE
15 years 1 months ago
Alleviating Priority Inversion and Non-Determinism in Real-Time CORBA ORB Core Architectures
There is increasing demand to extend Object Request Broker (ORB) middleware to support distributed applications with stringent real-time requirements. However, conventional ORB im...
Douglas C. Schmidt, Sumedh Mungee, Sergio Flores-G...