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ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
15 years 6 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
AUTONOMICS
2008
ACM
14 years 11 months ago
Verification and semantic parallelization of goal-driven autonomous software
Future space missions such as the Mars Science Laboratory demand the engineering of some of the most complex manrated autonomous software systems. According to some recent estimat...
Damian Dechev, Nicolas Rouquette, Peter Pirkelbaue...
DAC
1999
ACM
15 years 1 months ago
Microprocessor Based Testing for Core-Based System on Chip
The purpose of this paper is to develop a exible design for test methodology for testing a core-based system on chip SOC. The novel feature of the approach is the use an embedde...
Christos A. Papachristou, F. Martin, Mehrdad Noura...
DDECS
2008
IEEE
227views Hardware» more  DDECS 2008»
14 years 11 months ago
Cryptographic System on a Chip based on Actel ARM7 Soft-Core with Embedded True Random Number Generator
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
Milos Drutarovsky, Michal Varchola
FAST
2008
14 years 10 months ago
Enhancing Storage System Availability on Multi-Core Architectures with Recovery-Conscious Scheduling
In this paper we develop a recovery conscious framework for multi-core architectures and a suite of techniques for improving the resiliency and recovery efficiency of highly conc...
Sangeetha Seshadri, Lawrence Chiu, Cornel Constant...