13 search results - page 1 / 3 » A cycle-accurate compilation algorithm for custom pipelined ... |
122
Voted
CODES
2005
IEEE
16 years 9 days ago
2005
IEEE
204
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ESTIMEDIA
2005
Springer
16 years 6 days ago
2005
Springer
Designing Application-Specific Instruction-set Processors (ASIPs) usually requires designing a custom datapath, and modifying instruction-set, instruction decoder, and compiler. A...
167
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ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
146
Voted
CGO
2008
IEEE
16 years 1 months ago
2008
IEEE
In the embedded domain, custom hardware in the form of ASICs is often used to implement critical parts of applications when performance and energy efficiency goals cannot be met ...
179
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DAC
2004
ACM
16 years 3 days ago
2004
ACM
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...