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ISPA
2007
Springer
15 years 7 months ago
Parallelization Strategies for the Points of Interests Algorithm on the Cell Processor
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...
Tarik Saidani, Lionel Lacassagne, Samir Bouaziz, T...
IPPS
2006
IEEE
15 years 7 months ago
Algorithmic skeletons for stream programming in embedded heterogeneous parallel image processing applications
Algorithmic skeletons can be used to write architecture independent programs, shielding application developers from the details of a parallel implementation. In this paper, we pre...
Wouter Caarls, Pieter P. Jonker, Henk Corporaal
IPPS
2002
IEEE
15 years 6 months ago
Portals 3.0: Protocol Building Blocks for Low Overhead Communication
This paper describes the evolution of the Portals message passing architecture and programming interface from its initial development on tightly-coupled massively parallel platfor...
Ron Brightwell, William Lawry, Arthur B. Maccabe, ...
HPCA
2000
IEEE
15 years 6 months ago
Decoupled Value Prediction on Trace Processors
Value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction, and executes speculatively its data-dependent instructions based on ...
Sang Jeong Lee, Yuan Wang, Pen-Chung Yew
DAC
2004
ACM
16 years 2 months ago
Security as a new dimension in embedded system design
The growing number of instances of breaches in information security in the last few years has created a compelling case for efforts towards secure electronic systems. Embedded sys...
Srivaths Ravi, Paul C. Kocher, Ruby B. Lee, Gary M...