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DATE
2003
IEEE
124views Hardware» more  DATE 2003»
15 years 5 months ago
A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs
: Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath des...
Jennifer Y.-L. Lo, Wu-An Kuo, Allen C.-H. Wu, Ting...
DAC
2006
ACM
16 years 20 days ago
Rapid estimation of control delay from high-level specifications
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...
Gagan Raj Gupta, Madhur Gupta, Preeti Ranjan Panda
TACO
2008
130views more  TACO 2008»
14 years 11 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
TC
2011
14 years 6 months ago
An Architecture for Fault-Tolerant Computation with Stochastic Logic
—Mounting concerns over variability, defects and noise motivate a new approach for digital circuitry: stochastic logic, that is to say, logic that operates on probabilistic signa...
Weikang Qian, Xin Li, Marc D. Riedel, Kia Bazargan...
IJES
2006
72views more  IJES 2006»
14 years 11 months ago
Non-contiguous linear placement for reconfigurable fabrics
: We present efficient solutions for the non-contiguous linear placement of data-paths for reconfigurable fabrics. A strip-based architecture is assumed for the reconfigurable fabr...
Cristinel Ababei, Kia Bazargan