189 search results - page 12 / 38 » A design framework to efficiently explore energy-delay trade... |
86
Voted
ARITH
2007
IEEE
15 years 4 months ago
2007
IEEE
In this paper we explore the relationship between adder topology and energy efficiency. We compare the energy-delay tradeoff curves of selected 32-bit adder topologies, to determi...
138
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CASES
2003
ACM
2003
ACM
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
15 years 4 months ago
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
130
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USENIX
2008
15 years 2 months ago
2008
A common approach to benchmarking a server is to measure its behavior under load from a workload generator. Often a set of such experiments is required-perhaps with different serv...
118
Voted
DAC
2004
ACM
15 years 5 months ago
2004
ACM
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....
114
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DATE
1999
IEEE
15 years 4 months ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...