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IPPS
2000
IEEE
15 years 2 months ago
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
Jim Nilsson, Fredrik Dahlgren
EUROPAR
2010
Springer
14 years 9 months ago
Multi-GPU and Multi-CPU Parallelization for Interactive Physics Simulations
Today, it is possible to associate multiple CPUs and multiple GPUs in a single shared memory architecture. Using these resources efficiently in a seamless way is a challenging issu...
Everton Hermann, Bruno Raffin, François Fau...
CCS
2008
ACM
14 years 11 months ago
Code injection attacks on harvard-architecture devices
Harvard architecture CPU design is common in the embedded world. Examples of Harvard-based architecture devices are the Mica family of wireless sensors. Mica motes have limited me...
Aurélien Francillon, Claude Castelluccia
ESAW
2008
Springer
14 years 11 months ago
Coping with Exceptions in Agent-Based Workflow Enactments
A workflow involves the coordinated execution of multiple operations and can be used to capture business processes. Typical workflow management systems are centralised and rigid; t...
Joey Sik Chun Lam, Frank Guerin, Wamberto Weber Va...
DAGSTUHL
2003
14 years 11 months ago
Components, Features, and Agents in the ABC
Abstract. In this paper, we show how the concepts of objects, components, features and agents are used today in the Agent Building Center (ABC) environment in order to marry the mo...
Tiziana Margaria