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PDP
2010
IEEE
15 years 1 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
86
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BROADNETS
2005
IEEE
15 years 3 months ago
Modeling and performance evaluation of ISCSI storage area networks
Abstract— This paper provides a concise modeling and performance evaluation of the iSCSI storage area network (SAN) architecture and protocol. SANs play a key role in business co...
Christoph M. Gauger, Martin Köhn, Sebastian G...
SSR
2001
73views more  SSR 2001»
14 years 11 months ago
XML implementation of frame processor
A quantitative study has shown that frame technology [1] supported by Fusion toolset can lead to reduction in time-tomarket (70%) and project costs (84%). Frame technology has bee...
Tak Wong, Stan Jarzabek, Soe Myat Swe, Ru Shen, Ho...
BMCBI
2010
195views more  BMCBI 2010»
14 years 4 months ago
MBAT: A scalable informatics system for unifying digital atlasing workflows
Background: Digital atlases provide a common semantic and spatial coordinate system that can be leveraged to compare, contrast, and correlate data from disparate sources. As the q...
Daren Lee, Seth Ruffins, Queenie Ng, Nikhil Sane, ...
DAC
2004
ACM
15 years 10 months ago
Automated energy/performance macromodeling of embedded software
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow. Macromodeling based estimation is an attempt to speed up estim...
Anish Muttreja, Anand Raghunathan, Srivaths Ravi, ...