An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Semantic Web Enabled Web Services (SWWS) will transform the web from a static collection of information into a distributed device of computation on the basis of Semantic Web techn...
Christoph Bussler, Dieter Fensel, Alexander Maedch...
Our previous work has shown that architectural and application shifts have resulted in modern OLTP databases increasingly falling short of optimal performance [10]. In particular,...
Robert Kallman, Hideaki Kimura, Jonathan Natkins, ...
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
Nowadays, workflow research has shifted from fundamentals of workflow modelling and enactment towards improvement of the workflow modelling lifecycle and integration of workflow en...